1. Field of the Invention
The present invention generally relates to a wiring board, and particularly relates to a wiring board having formed thereon a via for electrically connecting among layers, and a manufacturing method thereof.
2. Description of the Related Art
As a method of manufacturing a wiring board on which semiconductor devices and the like are mounted, there is a so-called build-up process. FIG. 1 through FIG. 7 illustrate cross-sectional views of manufacturing processes of a wiring board according to the related-art build-up process. In a first manufacturing process illustrated in FIG. 1, a conducting layer 520 is formed on the top face of a substrate 510, and also a conducting layer 530 is similarly formed on the bottom face of the substrate 510. In a second manufacturing process illustrated in FIG. 2, a through hole 540 which penetrates the substrate 510 as well as the conducting layers 520 and 530 is formed. In a third manufacturing process illustrated in FIG. 3, a conducting layer 550 is formed by a plating process on the surfaces of the substrate 510 (including the inner-wall faces of the through hole 540) and on the surfaces of the conducting layers 520 and 530. Next, in a fourth manufacturing process illustrated in FIG. 4, by an etching process and the like, the conducting layers 520 and 550 are patterned so as to have wiring patterns 560 and 555 formed, while the conducting layers 530 and 550 are patterned so as to have wiring patterns 570 and 555 formed. Thereafter, in a fifth manufacturing process illustrated in FIG. 5, an insulating resin layer 580 is formed on the top face of the substrate 510. Furthermore, an insulating resin layer may similarly be formed also on the bottom face of the substrate 510. In a sixth manufacturing process illustrated in FIG. 6, within the insulating resin layer 580, an opening section 590 is formed at a via-forming region by a laser-beam machining process so as to cause the wiring patterns 560 and 555 to be exposed. Furthermore, in a seventh manufacturing process illustrated in FIG. 7, a conducting film 600 is formed by the plating process on inner-wall faces of the opening section 590, while a via 610 for electrically connecting between the layers is formed by the conducting film 600 and the wiring patterns 560 and 555 which have been exposed to the opening section 590. Moreover, a wiring pattern 620 is formed on the top face of the insulating resin layer 580.
With the manufacturing method of the wiring board as described above, while the opening section 590 is formed by the laser-beam machining process, in the laser-beam machining process, appropriately controlling the strength of the laser beam and the time of irradiating the laser beam is not easy, resulting in an increasing of the cost of manufacturing. Therefore, a method of forming the opening section 590 by an imprint process in which a die having a projecting section formed thereon is thrust is being proposed (e.g. referring to page 5 and FIG. 5 of the Patent Document 1).
FIG. 8 and FIG. 9 are enlarged cross-sectional views of manufacturing processes in which the opening section 590 is formed by the press process using the die. In a first manufacturing process illustrated in FIG. 8, a die 700 is arranged over the top face of the interlayer resin layer 580. A convex section 710 is formed on one face of the die 700, and is arranged so that the face on which the convex section 710 is formed opposes the interlayer resin layer 580. Furthermore, in a second manufacturing process illustrated in FIG. 9, the interlayer resin layer 580 is thrust by the die 700 so that the opening section 590 is formed.
Patent Document 1
JP2002-171048A
However, in the process of forming the opening section 590 by the press process using the die 700 as described above, in a case that the tip of the convex section 710 formed on the die 700 is flat-shaped, as illustrated in FIG. 9, resin 720 may remain at the bottom portion of the opening section 590. In the seventh process as illustrated in FIG. 7, at the time the conducting film 600 is formed by the plating process, as the remaining resin 720 prevents an electrical connection between the conducting film 600 and the wiring patterns 560 and 555, a need arises for removing the remaining resin 720 by the etching process and the like. Therefore, a further simplification of the process is being called for.